The National Science Foundation (NSF), in collaboration with the Semiconductor Industry Association’s Nanoelectronics Research Initiative (NRI), is offering supplemental funding. This grant is for graduate students and postdoctoral fellows to engage in long-term nanoelectronics research, specifically exploring concepts beyond current CMOS technology. The primary purpose is to identify novel, non-FET based logic switches using new computational state variables. NRI is particularly interested in circuit architectures for non-FET devices, directed self-assembly, and nano-engineering of phonon flow to control heat. All proposed research should focus on achieving low energy consumption while maintaining high computational speed, aiming to develop future industry and faculty researchers and strengthen industry linkages.
Opportunity ID: 53428
General Information
| Document Type: | Grants Notice |
| Funding Opportunity Number: | PD-10-031 |
| Funding Opportunity Title: | NSF-NRI Graduate Student and Postdoctoral Fellow Supplements to NSF Centers in Nanoelectronics (NSF 10-031) |
| Opportunity Category: | Discretionary |
| Opportunity Category Explanation: | – |
| Funding Instrument Type: | Grant |
| Category of Funding Activity: | Science and Technology and other Research and Development |
| Category Explanation: | – |
| Expected Number of Awards: | 0 |
| Assistance Listings: | 47.041 — Engineering Grants |
| Cost Sharing or Matching Requirement: | No |
| Version: | Synopsis 1 |
| Posted Date: | Apr 01, 2010 |
| Last Updated Date: | – |
| Original Closing Date for Applications: | May 10, 2010 Supplement Due Date(s) (due by 5 p.m. proposer’s local time): May 10, 2010 |
| Current Closing Date for Applications: | May 10, 2010 Supplement Due Date(s) (due by 5 p.m. proposer’s local time): May 10, 2010 |
| Archive Date: | – |
| Estimated Total Program Funding: | $0 |
| Award Ceiling: | – |
| Award Floor: | – |
Eligibility
| Eligible Applicants: | Unrestricted (i.e., open to any type of entity above), subject to any clarification in text field entitled “Additional Information on Eligibility” |
| Additional Information on Eligibility: | – |
Additional Information
| Agency Name: | U.S. National Science Foundation |
| Description: | See the Dear Colleague Letter, NSF 10-013, announcing this opportunity at http://www.nsf.gov/publications/pub_summ.jsp?ods_key=nsf10013.The National Science Foundation (NSF) has undertaken a cooperative effort with the Semiconductor Industry Association (SIA) through the industry’s Nanoelectronics Research Initiative (NRI) to provide supplemental funding opportunities to NSF centers involved in long-term nanoelectronics research. The supplemental funding supports additional graduate students and postdoctoral fellows to work in collaborative efforts with participating NRI company assignees on exploring new concepts beyond the scaling limits of CMOS (Complementary Metal Oxide Semiconductor) technology. Such efforts are intended to enhance nanoelectronics research and education, strengthen industry linkages with NSF centers, and develop future cadres of industry and faculty researchers to help drive the field.NSF and NRI are continuing this cooperative supplement opportunity for a fifth year. The supplement research topics must be consistent with the goals of the NSF centers and must also align with the goals of NRI to find a novel, non-FET based logic switch as a successor to CMOS technology. NRI is focused primarily on research on devices utilizing new computational state variables other than the control of electronic charge by a potential barrier utilized in current FET technology. For this supplement opportunity, NRI is particularly interested in three areas: Circuit architectures for doing computation with non-FET devices; directed self-assembly and bottoms-up fabrication of specific non-FET device structures; and nano-engineering of phonon flow in non-FET devices and circuits to control heat and enable non-equilibrium behavior. Since the primary limitation to scaling is increasing power density, all of the non-FET devices and architectures should focus on opportunities for achieving low energy consumption while maintaining high computational speed, and NRI is open to new ideas in this area in general.Recent awards made through this supplement activity may be found at http://www.nsf.gov/crssprgm/nano/ |
| Link to Additional Information: | NSF Program Desccription 10-031 |
| Grantor Contact Information: | If you have difficulty accessing the full announcement electronically, please contact:
NSF grants.gov support
grantsgovsupport@nsf.gov Email:grantsgovsupport@nsf.gov |
Version History
| Version | Modification Description | Updated Date |
|---|---|---|
Related Documents
There are no related documents on this grant.
Packages
| Agency Contact Information: | NSF grants.gov support grantsgovsupport@nsf.gov Email: grantsgovsupport@nsf.gov |
| Who Can Apply: | Organization Applicants |
| Assistance Listing Number | Competition ID | Competition Title | Opportunity Package ID | Opening Date | Closing Date | Actions |
|---|---|---|---|---|---|---|
| 47.070 | PKG00018114 | Apr 01, 2010 | May 10, 2010 | View |
Package 1
Mandatory forms
53428 RR_SF424_1_2-1.2.pdf
53428 PerformanceSite_1_2-1.2.pdf
53428 RR_OtherProjectInfo_1_2-1.2.pdf
53428 RR_KeyPersonExpanded_1_2-1.2.pdf
53428 RR_PersonalData_1_2-1.2.pdf
53428 RR_Budget-1.1.pdf
53428 NSF_CoverPage_1_3-1.3.pdf
Optional forms
53428 RR_SubawardBudget-1.2.pdf
53428 NSF_DeviationAuthorization-1.1.pdf
53428 NSF_SuggestedReviewers-1.1.pdf
53428 NSF_Registration_1_3-1.3.pdf
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